bi-cmos 8-bit serial-input latched driver m 549 95 p/ f p mitsubishi des cri pt i o n the m54995 i s a semiconductor integrated circuit consisting o f 8 stages of cmos shift registers and latches with serial inputs a n d serial o r parallel outputs. i t i s based o n bi-cmos process technology, and has 8 bipolar drivers at the parallel outputs. f e at ures l serial input and serial or parallel output l serial output enables cascade connection l built-in latch for each stage l enable input provides output control l low supply current (standby current i cc 10 m a) l serial i/o level is compatible with typical cmos devices l driver features: high withstand voltage (bv ceo 3 30v) l wide operating temperature range t a =-20 ?+75 c app l i cat i o n dot drivers for thermal print heads. serial/parallel conversion. drivers for relays and solenoids. f unct i o n the m54995 consists of 8 stages of d-type flip flops connected to 8 latches. data is input to serial input s-in, and clock pulses are input t o clock input t. when the clock changes from low to high, the input data enters the first shift register and data already in the shift registers is shifted sequentially. the serial output s-out is used to connect multiple m54995 t o expand the number of parallel outputs. s-out is connected to s-in of the next stage. for parallel output. when the clock pulse changes from low t o high, latch input (latch) is high and output enable input (en) i s low the serial input data at s-in appears at output o1 and the other data already present is shifted sequentially to outputs o2 through o8. the parallel outputs are inverted. when the latch input is held low, the latch retains the stored data. when the en input is high, outputs o1 through o8 all turn off. as the internal logic is unstable when the power is turned on, the en input should be kept high (setting outputs o1 through o8 off) until input data is set and the internal logic is initialized. l-gnd is the gnd of cmos logic circuit and p-gnd is the gnd of output driver circuits o 1 through o 8 which employ bipolar transistors capable of large drive currents. b l oc k d ia gr a m pi n c o n f i g urat i o n ( to p v i e w ) outline 16p4(p) 16p2n-a(fp) 16 13 14 15 1 4 3 2 12 5 11 6 10 7 9 8 ? ? ? ? ? ? ? ? ? ? ? ? ? t s-in l-gnd v cc s-out latch en p-gnd o1 o2 o3 o4 o5 o6 o7 o8 clock serial input logic gnd power supply serial output latch input enable input driver gnd parallel outputs m5 4995p /f p serial output q l d q t d o1 parallel outputs 16 q l d q t d o2 q l d q t d o3 q l d q t d o4 q l d q t d o5 q l d q t d o6 q l d q t d o7 q l d q t d o8 15 14 13 12 11 10 9 4 6 3 1 7 5 8 power supply en enable input latch latch input s-in serial input t clock 2 s-out p-gnd driver gnd l-gnd logic gnd v cc
bi-cmos 8-bit serial-input latched driver m 549 95 p/ f p mitsubishi t i m i ng chart i nput / o ut p ut ci rc ui t di ag ram 1 inputs with pullup resistor (en, latch) 2 inputs with pulldown resistor (t, s-in) 3 serial output (s-out) 4 parallel outputs (o1 ? o8) s-in serial input t clock latch latch input en enable input s-out serial output o1 o2 o3 o4 o5 o6 o7 o8 parallel outputs * the state of the shaded part is unstable. r in v cc l-gnd r in v cc l-gnd v cc l-gnd v cc l-gnd p -gnd
bi-cmos 8-bit serial-input latched driver m 549 95 p/ f p mitsubishi symbol ratings unit parameter conditions abs o l ut e m axi m um rat i ng s (t a =-20 to 75 c, unless otherwise noted) v cc v i v o i o p d supply voltage s-out o1 ? o8 : off t a =25 c -0.5 ? +8 -0.5 ? v cc +0.5 -0.5 ? v cc +0.5 -0.5 ? 30 60 1.25 0.8 v v v ma w c t stg t opr input voltage output voltage output current power dissipation operating temperature storage temperature o1 ? o8 : on m54995p M54995FP c limits min. typ. max. symbol conditions unit parameter rec o m m e nde d o perat i n g d o ndi t i o n v cc supply voltage output apply voltage output current (per circuit) 456 30 50 v v ma v o i o o1 ? o8 : off o1 ? o8 : on limits min. typ. max. symbol test conditions unit parameter el ect r i cal charact eri s t i cs (t a =25 c, v cc =5v, unless otherwise noted) v ih v il high-level input voltage low-level input voltage high-level input current low-level input current input resistance high-level output voltage low-level output voltage low-level output current low-level output voltage supply current t a =20 ? 75 c, v cc =4 ? 6v input: open, all driver outputs: off one driver output is on. en, latch s-out s-out o1 ? o8 | io | 1 m a v oh =4.5v v ol =0.4v i ol =50ma i ol =60ma v o =30v 0.7v cc 0 50 4.9 -100 400 v cc 0.3v cc 0.1 0.5 0.6 50 10 3 v v m a m a k w v v m a m a v v m a m a ma i cc2 i cc1 i olk v ol1 v ol2 i oh i ol v oh v ol r in i ih i il output leak current v ih =5v v il =0v s-in, t s-out s-out high-level output current 100 -100 limits min. typ. max. symbol test conditions unit parameter t i m i ng req u i r e m e n t s (t a =-20 to 75 c, unless otherwise noted) f (t) t w(t) t w(l) t su t h t d(t-l) t r(t) t f (t) clock frequency clock pulse width latch pulse width data setup time data hold time clock-latch time clock pulse rise time clock pulse fall time input duty cycle: 40 ? 60% 200 200 100 100 400 50 0 50 0 2 mhz ns ns ns ns ns ns ns -55 ? 125 -20 ? 75 o1 ? o8
bi-cmos 8-bit serial-input latched driver m 549 95 p/ f p mitsubishi t i m i ng chart v ih =5v v il =0v r l (s-out )= r l (o n )=100 w (n=1?) c l =15pf t i m i ng chart limits min. typ. max. symbol test conditions unit parameter sw i t chi ng chara ct e r i s t i cs (t a =25 c, v cc =5v, unless otherwise noted) t plh t phl t plh t phl t plh low-to-high-level output propagation time from input t to output s-out high-to-low-level output propagation time from input t to output s-out low-to-high-level output propagation time from input t to output o n high-to-low-level output propagation time from input t to output o n low-to-high-level output propagation time from input en to output o n 0.3 0.3 10 5 10 m s m s m s m s m s t phl high-to-low-level output propagation time from input en to output o n 5 m s t est ci rcui t serial data input clock latch input t su 2.5v t h t w (t) t r (t) s-in t latch 2.5v 2.5v 2.5v 90% 10 % t d (t-l) t w (l) 2.5v 2.5v t f (t) 90% 10 % the in put waveform: t r 20ns, t f 20ns the capacitance c l includes the wiring stray capacitance and probe input capacitance. v cc r l c l input pg 50 w m5 4995p /f p output 2.5v t plh 2.5v s-out t 2.5v t phl 2.5v 2.5v 2.5v 2.5v 2.5v 2.5v t plh 2.5v t plh t phl en o n serial output clock enable input output t phl
bi-cmos 8-bit serial-input latched driver m 549 95 p/ f p mitsubishi t ypi cal charact eri s t i cs (t a =25 c, v cc =5v, unless otherwise noted) t a = -20 c t a = 25 c t a = 75 c driver output v ol vs. i ol 0 0 0 supply voltage v cc (v) 0 low-level output current i ol (ma) supply current i cc (ma) low-level output voltage v ol (mv) v cc vs. i cc (only one output is on.) 100 2 00 3 00 4 00 5 00 51 0 1 2 3 4 5 6 7 50 100 thermal derating (absolute maximum rating) 0 0 0.5 1.0 1.5 25 50 75 100 m54995p 0 100 duty cycle (%) 0 75 100 50 25 power dissipation p d (w) output current i ol (ma) ambient temperature t a ( c) 20 40 60 80 duty cycle vs. output current (m54995p/fp) t a = 75 c repetitive frequency > 10h z each figure in a circle shows the n umber of output circuits which operate simultaneously. current value : output current per circuit 1 8 M54995FP
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